The Media Independent Interface (MII) is a standard interface used to connect a Fast Ethernet (i.e. 100Mb/s) MAC-block to a PHY. The MII may connect to an external transceiver device via a pluggable connector (see photo) or simply connect two chips on the same printed circuit board. Being media independent means that any of several different types of PHY devices can be used without redesigning or replacing the MAC hardware. The equivalents of MII for other speeds are AUI (for 10 megabit Ethernet), GMII (for gigabit Ethernet), and XAUI (for 10 gigabit Ethernet).
Gigabit Media Independent Interface (GMII) is an interface between the Media Access Control (MAC) device and the physical layer (PHY). The interface defines speeds up to 1000 Mbit/s, implemented using an eight bit data interface clocked at 125 MHz, and is backwards compatible with the Media Independent Interface (MII) specification. It can also operate on fall-back speeds of 10/100 Mbit/s as per the MII specification.
Data on the interface is framed using the IEEE Ethernet standard. As such it consists of a preamble, start of frame delimiter, Ethernet headers, protocol specific data and a cyclic redundancy check (CRC) checksum.
The GMII interface is defined in IEEE Standard 802.3, 2000 Edition [1].
Reduced Gigabit Media Independent Interface (RGMII) specifies a particular interface between an Ethernet MAC and PHY.
RGMII uses half the number of pins as used in the GMII interface. This reduction is achieved by clocking data on both the rising and falling edges of the clock, and by eliminating non-essential signals (carrier-sense and collision-indication). Thus RGMII consists only of: RXC, RD[3:0], RX_CTL, TXC, TXD[3:0], and TX_CTL (12 pins, as opposed to GMII's 24).
Unlike GMII, the transmit clock signal is always provided by the MAC on the TXC line, rather than being provided by the PHY for 10/100 Mbit/s operation and by the MAC at 1000 Mbs.
RGMII supports Ethernet speeds of 10 Mbit/s, 100 Mb/s and 1000 Mbit/s.
The Serial Gigabit Media Independent Interface (SGMII) is a sequel of MII, a standard interface used to connect an Ethernet MAC-block to a PHY. It is used for Gigabit Ethernet (contrary to Ethernet 10/100 for MII). It differs from GMII by its low-power and low pin count serial interface (commonly referred to as a SerDes). To carry frame data and link rate information between a 10/100/1000 PHY and an Ethernet MAC, SGMII uses a differential pair for data signals and for clocking signals, with both being present in each direction (i.e., transmit and receive), giving 8 signal lines in total.
XAUI is a standard for extending the XGMII (10 Gigabit Media Independent Interface) between the MAC and PHY layer of 10 Gigabit Ethernet (10GbE). XAUI is pronounced "zowie", a concatenation of the Roman numeral X, meaning ten, and the initials of "Attachment Unit Interface".
The XGMII Extender, which is composed of an XGXS at the MAC end, an XGXS at the PHY end and a XAUI between them, is to extend the operational distance of the XGMII and to reduce the number of interface signals. Applications include extending the physical separation possible between MAC and PHY components in a 10 Gigabit Ethernet system distributed across a circuit board.
Orignal From: RGMII,SGMII,XAUI
